How long does eMMC last?
NAND flash storage isn’t just a read-only or write-only data medium. Several algorithms, including wear levelling, garbage collection, error control, and NAND block management, should be used for reliable use. Modern NAND flash is managed by algorithms that are implemented on the storage device rather than the host processor. Users will benefit from this since it makes NAND management for the host is less difficult and streamlines product support and maintenance. Hence ICFix Service provides an eMMC training institute in Chennai.
NAND flash host writes contain inefficiencies that can hasten the medium’s failure. The page, which can be read and programmed but not erased, is the lowest organisational unit of NAND. The block, which is made up of numerous pages, is the only organisational unit that may be deleted. Therefore, until a block is deleted, pages cannot be replaced. As blocks’ endurance limit is approached, they may eventually fail. There can also be flaws that result in early failures. NAND storage has a finite number of program-erase cycles. When that limit is reached, the device enters an unreliable state known as EoL. The configuration of the NAND cells affects endurance.
512-byte sector units, which are logical rather than physical, are read and written to by eMMC. Logical Block Addresses, or LBAs, are another name for sector addresses. Erasing the entire NAND block when data is updated is problematic and results in inefficient wear on pages that did not change. Wear levelling is the process of balancing block wear with smaller writes provided by an LBA-PBA (Physical Block Address) mapping method. Using an address translation table, LBAs are translated to PBAs. This procedure enhances write speed while balancing block wear.
The address mapping procedure operates as follows:
● NAND pages are 16kb, and eMMC sectors are 512 bytes. 32 consecutive sector addresses are compiled into a page-sized unit by a mapping table.
● The controller reads the complete group of sectors for that page when a sector in a page group is modified. It then updates any modified sectors and programs fresh data to a new page.
● The table is updated with the block and page addresses of the modified NAND page after the updated page has been programmed, replacing the earlier entry.
● NAND flash needs to program an entire page even if just one sector was changed. Write amplification is the term for this inefficiency. The WAF (Write Amplification Factor) measures the proportion of eMMC device-level writes to NAND flash writes.
The biggest source of write amplification is typically small, unpredictable, non-page-aligned rewrites. Writes should be aligned on a page boundary in multiples of page size units to reduce WAF. The extended CSD register’s optimal write size field contains this ideal unit size.
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